At-speed structural test

The simplest structural tester is one which merely investigates the static logical structure of an IC through a JTAG 1149.1 Boundary Scan port[1]. This is possible if the IC is implemented with the appropriate private JTAG instructions and uses full scan design[2]. Such a tester is little more than a few power supplies, a device fixturing arrangement, three digital input drivers, one digital output receiver, and a computer. The only hardware requirement the computer must satisfy is that it has enough program memory and disk storage to handle all the test data. If the power supplies have good current monitoring capability, such a tester could also add IDDQ measurement to its structural analysis repertoire.